Publications

2025

Srinivasan Subramaniyan and Xiaorui Wang. "FC-GPU: Feedback Control GPU Scheduling for Real-time Embedded Systems" Embedded Systems Week – International Conference on Embedded Software (EMSOFT) 2025.
Yuan Ma, Srinivasan Subramaniyan, and Xiaorui Wang. "Power Capping of GPU Servers for Machine Learning Inference Optimization" 54th International Conference on Parallel Processing (ICPP) 2025.

Chen, Guoyu, Srinivasan Subramaniyan, and Xiaorui Wang. "Latency-Guaranteed Co-Location of Inference and Training for Reducing Data Center Expenses" IEEE 44th International Conference on Distributed Computing Systems (ICDCS) 2024.

Srinivasan Subramaniyan, and Xiaorui Wang. "OptiCPD: Optimization For The Canonical Polyadic Decomposition Algorithm on GPUs." 2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). IEEE, 2023.

Subramaniyan, Srinivasan , Oscar Ferraz, M. R. Ashuthosh, Santosh Krishna, Guohui Wang, Joseph R. Cavallaro, Vitor Silva, Gabriel Falcao, and Madhura Purnaprajna. "Enabling High-Level Design Strategies for High-Throughput and Low-Power NB-LDPC Decoders." IEEE Des. Test 40, no. 1 (2023): 85-95.
Ashuthosh, M. R., Krishna, S., Sudarshan, V., Subramaniyan, S ., & Purnaprajna, M. (2022, February). MAPPARAT: A Resource Constrained FPGA-Based Accelerator for Sparse-Dense Matrix Multiplication. In 2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID) (pp. 102-107). IEEE.

Ferraz, O., Subramaniyan, S. , Chinthalaa, R., Andrade, J., Cavallaro, J. R., Nandy, S. K., ... & Falcao, G. (2021). A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA, and GPU Architectures. IEEE Communications Surveys & Tutorials, 24(1), 524-556.

Ferraz, O., Subramaniyan, S ., Wang, G., Cavallaro, J. R., Falcao, G., & Purnaprajna, M. (2020, May). Gbit/s non-binary LDPC decoders: High-throughput using high-level specifications. In 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) (pp. 226-226). IEEE.
Subramaniyan, S., Ferraz, O., Ashuthosh, M. R., Krishna, S., Wang, G., Cavallaro, J. R., ... & Purnaprajna, M. (2020, October). Pushing the limits of energy efficiency for non-binary LDPC decoders on GPUs and FPGAs. In 2020 IEEE Workshop on Signal Processing Systems (SiPS) (pp. 1-6). IEEE.
K. Vanishree, A. George, S. Gunisetty, Subramaniyan, S , S. Kashyap R., and M. Purnaprajna, "CoIn: Accelerated CNN Co-Inference through Data Partitioning on Heterogeneous Devices," 2020 6th International Conference on Advanced Computing and Communication Systems (ICACCS), 2020, pp. 90-95, doi: 10.1109/ICACCS48705.2020.9074444.

Srinivasan Subramaniyan and Xiaorui Wang. "FC-GPU: Feedback Control GPU Scheduling for Real-time Embedded Systems" Embedded Systems Week – International Conference on Embedded Software (EMSOFT) 2025.
Yuan Ma, Srinivasan Subramaniyan, and Xiaorui Wang. "Power Capping of GPU Servers for Machine Learning Inference Optimization" 54th International Conference on Parallel Processing (ICPP) 2025.
Chen, Guoyu, Srinivasan Subramaniyan, and Xiaorui Wang. "Latency-Guaranteed Co-Location of Inference and Training for Reducing Data Center Expenses" IEEE 44th International Conference on Distributed Computing Systems (ICDCS) 2024.
Ashuthosh, M. R., Krishna, S., Sudarshan, V., Subramaniyan, S., & Purnaprajna, M. (2022, February). MAPPARAT: A Resource Constrained FPGA-Based Accelerator for Sparse-Dense Matrix Multiplication. In 2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID) (pp. 102-107). IEEE.
K. Vanishree, A. George, S. Gunisetty, Subramaniyan, S., S. Kashyap R., and M. Purnaprajna, "CoIn: Accelerated CNN Co-Inference through Data Partitioning on Heterogeneous Devices," 2020 6th International Conference on Advanced Computing and Communication Systems (ICACCS), 2020, pp. 90-95, doi: 10.1109/ICACCS48705.2020.9074444.

S. Subramaniyan et al., "Enabling High-Level Design Strategies for High-Throughput and Low-Power NB-LDPC Decoders," in IEEE Design & Test, 2022, doi: 10.1109/MDAT.2022.3202852.
Ferraz, O., Subramaniyan, S., Chinthalaa, R., Andrade, J., Cavallaro, J. R., Nandy, S. K., ... & Falcao, G. (2021). A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA, and GPU Architectures. IEEE Communications Surveys & Tutorials, 24(1), 524-556.
S. Subramaniyan et al., "Pushing the Limits of Energy Efficiency for Non-Binary LDPC Decoders on GPUs and FPGAs," 2020 IEEE Workshop on Signal Processing Systems (SiPS), 2020, pp. 1-6, doi: 10.1109/SiPS50750.2020.9195258.

Subramaniyan, Srinivasan, and Xiaorui Wang. "OptiCPD: Optimization For The Canonical Polyadic Decomposition Algorithm on GPUs." 2023 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW). IEEE, 2023.
Ferraz, O., Subramaniyan, S., Wang, G., Cavallaro, J. R., Falcao, G., & Purnaprajna, M. (2020, May). Gbit/s non-binary LDPC decoders: High-throughput using high-level specifications. In 2020 IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) (pp. 226-226). IEEE.